MPEG-2 Encoders Launched for DVD,
Digital Satellite Broadcasting

US and Japanese IC makers are marketing chipsets - and making it possible to build a single board capable of realtime compression of high-quality video images.

Moving Picture Experts Group Phase 2 (MPEG-2) encoding chipsets are appearing in the market from multiple vendors including C-Cube Microsystems Inc of the US, Matsushita Electric Industrial Co Ltd and Mitsubishi Electric Corp of Japan, and NTT Electronics Technology Corp of Japan (manufacturing by NTT Corp of Japan). Similar chips are also expected from IBM Corp and LSI Logic Corp of the US in 1996, as shown in Table 1.

Of the 12 specifications within the MPEG-2 standard, realtime video data compression is implemented in compliance with typical specifications like Main Profile at Main Level (MP@ML) and Simple Profile at Main Level (SP@ML).

 

Digital Satellite and DVD Lead Way

MP@ML is one of the MPEG-2 specifications used in digital satellite broadcasting and digital video disks (DVD). It offers a screen format of 720 x 480 pixels or less (frame frequency 29.97Hz) or 720 x 576 pixels or less (frame frequency 25Hz), with a peak data encoding rate of 15 Mbits/s. SP@ML, another MPEG-2 specification, does not use the B-picture for two-way prediction, and though the compression rate for video data is lower than that achieved with MP@ML, it only requires half as much buffer memory for coding and decoding. Delay time is also shorter than under MP@ML, making it suitable for video-conferencing applications.

Digital satellite broadcasting and DVD appears to offer great market opportunities for MPEG-2, and a number of companies have introduced products. DirecTV Inc of the US launched digital satellite broadcasting and that initial launch was followed in May 1996 by Canal Plus of France with a 20-channel service and StarTV in Hong Kong.

In June 1996, test broadcasting began in Japan for the PerfecTV service offered by Digital Multichannel Corp (DMC) of Japan.1)

In the fall of 1996, DVD players will be marketed and the film firms are expected to release hundreds of titles at about the same time.

MPEG-2 encoding ICs are, as a result, experiencing booming sales to image software production studios and broadcasting stations.

 

C-Cube Halves Chip Counts

C-Cube, which holds the lion's share of the MPEG-1 and MPEG-2 encoder chip market, announced an MPEG-2 encoder IC named the VideoRISC Processor 3 (VRP-3) in April 1996.

With variations in the number of VRP-3 and microcode, the firm also offers the CLM4740 chipset for broadcasting stations and the CLM4720 chipset for generation of data for storage in media.

Compared to the predecessor VRP-2, the VRP-3 offers double the operation performance. While MP@ML encoding with the VRP-2 required 13 or 14 ICs, the CLM4740 chipset can handle it with only seven VRP-3 chips.

The CLM4720 is a five-IC chipset designed for use in encoders for video servers to distribute video image over a communication network. It supports variable rate encoding, which allows the required storage capacity for the image to be reduced.

The chipset does not support the field structure in which the image fields, scanned with interlace format, are allocated for the pictures which are the data compression unit. Only frames can be allocated for I, P and B pictures, however. The I, B and P pictures are types of images defined under MPEG-2. The I picture is an image encoded within the frame or field, so that encoding is complete within the image. The P picture predicts a motion from the previous image for inter-frame or inter-field encoding. And the B picture uses forward and backward motion compensated prediction, with response to the previous and next images for inter-frame or inter-field encoding.

The CLM4740 chipset for broadcasting stations supports frame and field structures.

 

IBM Three-IC Chipset

The MPEGME30 3-chip set announced by IBM in March 1996 implements MP@ML encoding. It consists of the MPEGSE10 (I chip), the MPEGSE20 (R chip) and MPEGSE30 (S chip).

IBM made it possible to handle MPEG-2 encoding with a single chip, in which case only the I picture is compressed and no inter-frame or inter-field prediction is provided. When the R chip is added the system can also use the P picture, and when all three chips are used the B picture is also supported (Fig 1).

This type of expandability is not provided in other chipsets: by changing the chip configuration, it is possible to use the chipset for a wide range of applications. For example, when an encoded image is to be edited, only the I picture is used for compression. At video-conferencing, its delay time would be reduced with both I and P pictures.

Another characteristic is it supports the 4:2:2 Profile@ML specification which was added in January 1996. This new specification is an MPEG-2 standard which adds support for 4:2:2 component encoding for video input/output equipment, often used at broadcasting stations, to the MP@ML standard. At present, this is the only chipset supporting this new standard.

 

Firmware Development in C

In March 1996, LSI Logic announced a chipset named the Video Instruction Set Computing (VISC) composed of three ICs: the L64110 video input processor (VIP) for image shuffling, noise reduction and other processing; the L64120 advanced motion estimation processor (AMEP) for motion compensation prediction; and the L64130 advanced video signal processor (AVSP) for discrete cosine transform (DCT)/reverse DCT and quantization/reverse quantization processing. MP@ML encoding requires a 5-chip configuration: three AMEPs and one each of the others.

All three of the chips have CW4001 32-bit reduced instruction set computer (RISC) processor cores. The instruction set used by the core is compatible with the microprocessors developed by MIPS Technologies, Inc of the US, which means that firmware can be developed using commercial realtime OS or C/C++ compilers for MIPS microprocessors. Compared to encoding ICs from other firms, which use proprietary microcode formats, this vastly simplifies firmware generation and maintenance.

 

Product Implementation

Matsushita Electric Industrial, Mitsubishi Electric and NTT have all marketed chipsets which are based on their prototypes.2)

Matsushita Electric Industrial uses the VDSP2/COMET chipset in its DVD authoring system encoder. The 6-chip set consists of two MN85510 (VDSP2) chips3) for DCT/reverse DCT, variable-rate encoding, and quantization/reverse quantization, and four MN85520 (COMET) motion estimation ICs.

In 1996 Mitsubishi Electric completed the v1.0 of the microcode to drive the chipset and has shipped the chipset to specific users.

The NTT chipset has been used in the IMVT3200 encoder/decoder for digital video trials on cable television networks and mounted on the REYMAY MPEG-2 encoding PC board complying to SP@ML. The board is marketed by a subsidiary of NTT Electronic Technology. The REYMAY encodes both video and audio (MPEG-1 audio) on one board.

 

Usage in PCs, Home-Use Recorders

For the time being, the MPEG-2 chipsets will be targeted primarily at broadcasting and video software production studios­but there are only a limited number of broadcasting stations.

"The shipment value of MPEG-2 encoders to broadcasting stations and studios should rise 60% in 1997 over the prior year, and then in 1998 drop about 30% back to roughly 1996 levels," a source from LSI Logic said.

Even so, many IC manufacturers are developing MPEG-2 encoding chipsets in the hope they will be used in home-use equipment. Most of the IC manufacturers are targeting the MPEG-2 encoding boards for PCs which are expected to experience a sharp rise in volume shipments beginning in 1997. The home market for digital television camera systems using MPEG-2 for video compression is expected to increase in 1998 and 1999 (Fig 2).

Possible applications for the PC encoding boards include small-scale studios which compress the educational video software used by corporations and universities and videoconferencing systems requiring high fidelity, like consumer finance contract machines and monitoring cameras and simple production systems for digital video disk read-only memory (DVD-ROM).

"Until 1995, we didn't expect MPEG-2 encoding ICs would reach the home until the year 2000. Now, it looks like it will happen in 1998 or 1999. We think the change is due to IBM and others pushing encoding IC integration and slashing prices, " a spokesperson for Mitsubishi said.

Between three and seven chips are required for video data compression to the MP@ML standard and the chipsets are priced at thousands of US dollars. NTT, for example, says it targets a price of under ¥200,000 for a PC encoding board.

Without major price reductions, it will be hard to sell PC boards and home-use digital television cameras in the commercial market. Some manufacturers targeting the rich potential of these markets are already working on single-chip designs.

 

Single-Chip Designs on Parade

IBM has disclosed plans to develop a single-chip MP@ML encoder IC named the MPEGLE10. The shipment date has not yet been announced but the target application is videoconferencing.

Mitsubishi Electric is advancing plans to integrate its 10-chip encoder to a 2-chip chipset with the same performance. The target completion date is the second quarter of 1997. The new chipset will integrate the existing M65721S and M65722S chips and an ME3 for motion estimation on a single chip.

The ME3 can detect all motion vectors with a horizontal range of ±64 pixels and a vertical range of ±32 pixels. When two ME3 are used, the horizontal range is doubled to ±128 pixels. In addition to this project, the firm is also developing a single chip encoder for an MP@ML MPEG-2 specification with a reduced function set.

Xing Inc of Japan­a major provider of karaoke for the communication network­plans to integrate the functions of the ZX-2000 MPEG-2 encoder on a single chip by the end of 1996. The ZX-2000 was developed by Zapex Technologies Inc, its US subsidiary. According to a spokesperson from Xing: "A motion vector detection range of ±128 pixels horizontal and ±64 pixels vertical will mean a gate scale of a million gates. If we can reduce this to ±64 pixels horizontal and ±32 pixels vertical, then 600,000 to 700,000 gates will be sufficient."

The single-chip design will be handled by Zapex Technologies in Israel. The Israel site was chosen because of the availability of engineers with experience in large-scale IC design.

Other firms like PC peripheral manufacturers Interware and FutureTel of the US have also announced plans to develop single-chip products.

 

by Mamoru Harada

 

References:

1) Tanaka, M, "Digital Broadcasting Boosts Demodulator ICs," NIKKEI ELECTRONICS ASIA, vol 4, no 12, pp 42-47, December 1995.

2) Tsurumi, T, "MPEG Chips Integrated for VideoCD," ibid, vol 4, no 7, pp 42-47, July 1995.

3) Aono, K, and Akiyama, T, "Realtime Encoding/Decoding DSP Developed," Nikkei Electronics (in Japanese), no 603, pp 111-116, March 14 1994.